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Integrated Transistor With Individually Variable Current Amplification

IP.com Disclosure Number: IPCOM000077979D
Original Publication Date: 1972-Oct-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Berger, HH: AUTHOR [+2]

Abstract

For many integrated circuit applications it is advantageous to provide transistors with different current amplifications. This applies to monolithic, bipolar storage arrangements in which low-current amplification transistors are preferably used for the storage cells, whereas high-current amplification transistors are preferably used for the control circuits integrated with the former transistors.

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Integrated Transistor With Individually Variable Current Amplification

For many integrated circuit applications it is advantageous to provide transistors with different current amplifications. This applies to monolithic, bipolar storage arrangements in which low-current amplification transistors are preferably used for the storage cells, whereas high-current amplification transistors are preferably used for the control circuits integrated with the former transistors.

The following transistor structure permits a selective reduction of the normally high-current amplification, without requiring additional process Steps.

Fig. 1 is a cross-sectional view of the structure consisting of a P substrate, an epitaxial N collector with an N+ subcollector, and a collector-embedded P base with an N+ emitter. In addition to the P+ isolation, an N+ collector contact zone is provided. Emitter E, base B, and collector C are contacted. This structure differs from the usual transistor structure in that a P+ base region, corresponding to the P+ isolation, is arranged under a part of the emitter. The current amplification can be varied by suitably selecting the area ratio of the p+ base region arranged underneath the emitter region. The P+ isolation and the P+ base region cam be produced in one process step.

The equivalent circuit diagram of Fig. 2 shows two transistors connected in parallel, one having a low-current amplification P+ base and the other having a high-current amplificat...