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Sense Amplifier

IP.com Disclosure Number: IPCOM000078047D
Original Publication Date: 1972-Nov-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Jacobson, EC: AUTHOR [+3]

Abstract

The field-effect transistors (FET) T1, T2, ..., T7, form a linear differential amplifier, the output of which is capacitively coupled through C1 to the detector (T8, T9, T15, T16, T17) and powering stages (T10 through T13). The powering circuit controls the gate of the output device, T14

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Sense Amplifier

The field-effect transistors (FET) T1, T2, ..., T7, form a linear differential amplifier, the output of which is capacitively coupled through C1 to the detector (T8, T9, T15, T16, T17) and powering stages (T10 through T13). The powering circuit controls the gate of the output device, T14

Devices T6 and T7 determine the bias voltage for T5, which is kept in the pinch-off region to act as a constant-current source. In the standby condition, both sense amplifier inputs, B Phi and B1, may be for example at +3 volts, causing the current from T5 to divide equally between T3 and T4. T3 and T4 are also in the pinch-off mode. This results in the DC voltage at nodes 1 and 2 being approximately
3.5 volts. During a memory read cycle, a difference voltage will be developed across the inputs, B Phi and B1 causing either T3 or T4 to turn "off", with the resultant voltage change at nodes 1 and 2. The voltage change at node 2 is capacitively coupled to the gate of T8 which acts as the detector input. The gate of detector input has been biased to approximately 0.6 volt above T8's threshold voltage, by devices T15, T16 and T17. For a read cycle, "module select" may be reduced, for example, from +7 volts to 0.2 volt, allowing the gate voltage of T8 to vary with the capacitively coupled signal. Device T9, has been selected so that the voltage at node 3 is approximately +3 volts during standby, thereby keeping the input devices (T10 and T12) of the powering stage "on"....