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Nondestructive Liquid Crystal Method of Locating FET Gate Oxide Shorts

IP.com Disclosure Number: IPCOM000078050D
Original Publication Date: 1972-Nov-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Garbarino, PL: AUTHOR [+2]

Abstract

A gate oxide short on a field-effect transistor (FET) can be located by employing liquid crystals (LC) to detect the heating generated by the short. The entire procedure takes only about two hours, in the following manner: Device Preparation: 1) Mount an FET chip 10 on a header 12 by wire bonds 14, 2) Clean chip/header assembly with acetone, 3) Deposit thin layer of carbon black on chip surface, by passing chip/header assembly down through the flame of a paraffin plumbers candle three or four times, at such a speed that will not excessively heat the chin, and visually inspect the carbon coating after each pass for continuity and uniformity.

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Nondestructive Liquid Crystal Method of Locating FET Gate Oxide Shorts

A gate oxide short on a field-effect transistor (FET) can be located by employing liquid crystals (LC) to detect the heating generated by the short. The entire procedure takes only about two hours, in the following manner: Device Preparation:

1) Mount an FET chip 10 on a header 12 by wire bonds 14,

2) Clean chip/header assembly with acetone,

3) Deposit thin layer of carbon black on chip surface,

by passing chip/header assembly down through the flame

of a paraffin plumbers candle three or four times, at

such a speed that will not excessively heat the chin,

and visually inspect the carbon coating after each

pass for continuity and uniformity.

Device Mounting:

4) Place the chip/header assembly in good thermal contact

with a thermally massive temperature controlled

substage 16.

5) Set the temperature of the substage at approximately

the temperature of transition of the LC to be used.

Device Test:

6) Place a small amount, e.g., one drop of a suitable LC

mixed with its volatile suspension medium, on the chip.

The temperature is cycled through the transition

temperature range of the LC, and the color coverage is

observed. If the coverage or color quality is poor,

another drop of LC is applied.

7) The temperature is now finely adjusted to be at the

lowest or lower point of the temperature range of the

LC, e.g., possibly 0.5 degree C below. A specification

on the temperature control unit is selected so...