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Configurable Computers

IP.com Disclosure Number: IPCOM000078083D
Original Publication Date: 1972-Nov-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 4 page(s) / 37K

Publishing Venue

IBM

Related People

Cocke, J: AUTHOR [+2]

Abstract

Two new types of general purpose machine organizations, called configurable computers, are proposed and briefly described. Both differ markedly from standard stored program computer organizations, and are based on the concept of having the machine structure change into the natural structure of the algorithm being performed. THE SEARCH MODE CONFIGURABLES.

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Configurable Computers

Two new types of general purpose machine organizations, called configurable computers, are proposed and briefly described. Both differ markedly from standard stored program computer organizations, and are based on the concept of having the machine structure change into the natural structure of the algorithm being performed. THE SEARCH MODE CONFIGURABLES.

The search mode configurable computers consist of a memory unit, a collection of "active" operational units, and a searcher. This basic organization is depicted in Fig. 1. The basic operation of this machine consists of an operation unit, when having completed a task of its type, asking (through the searcher) for a new task to perform. The searcher will inspect the memory, or suitable portions thereof, for a new task for the operational unit to perform. Operational units will consist of such devices as adders, multipliers, conditional testers, macro-operation modules, input-output devices, and the like. The capabilities of the machine will depend upon the types and number of operational modules in the system, the effective speed of the memory, and the capabilities of the searcher.

To describe the operation in more detail it is useful to discuss a typical format for an item in memory. An item may be stored in a single word or in a small block of words, but in each case will be considered to be a single entity in this discussion. Fig. 2 illustrates a typical format for an item associated with an arithmetic operation having two operands and one result.

In this kind of item the operation code is used to specify the operation to be performed. The first and second operand fields are thought of as "registers" to hold operands, and the address for the result is used to define the location into which the result is to be stored. The result normally will be stored into an operand field of some other item. The tag bits are used for status and sequencing information, and these, along with the operation code, are inspected by the searcher when it is looking for operations that are ready to be performed by operation units. For example, the tag bits would specify a condition that both operands had been produced and stored in the first and second operand fields, and that the address for the result was set. Upon such a condition, when a suitable operational unit became available and the searcher designated this item to be performed, the item (or whatever parts are required) would be sent to the operation unit for performance. This would update the tag information indicating that the data from the operand fields had been removed (thus freeing these areas for future results of other operations), and indicating that the operation was no longer ready to be performed. As operations are performed, new items become eligible for performance, and in this way the sequencing of the algorithm is primarily dependent upon the availability of operands and the basic data sequencing requireme...