Browse Prior Art Database

Noninverting Inhibit Driver

IP.com Disclosure Number: IPCOM000078174D
Original Publication Date: 1972-Nov-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Chin, WB: AUTHOR [+2]

Abstract

Shown are complementary field-effect transistor (FET) noninverting inhibit driver circuits. Fig. 1 is a schematic of a non-inverter driver with a single gate. As shown, when the gate is at ground (inhibit are nonselect) the data-out node is left floating. This provides a dotting function capability.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Noninverting Inhibit Driver

Shown are complementary field-effect transistor (FET) noninverting inhibit driver circuits. Fig. 1 is a schematic of a non-inverter driver with a single gate. As shown, when the gate is at ground (inhibit are nonselect) the data-out node is left floating.

This provides a dotting function capability.

Fig. 2 shows an extension of this capability by providing both decoding and driving functions within the inhibit gate. By coding lines A and B, one out of four data-in lines can be selected and gated onto one data-out node which is dotted with other gates In this manner, selected data is gated to the output node in its true phase when all gate lines are at - V volts (selected).

1

Page 2 of 2

2

[This page contains 3 pictures or other non-text objects]