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Laying Out Wiring for Design Automation of Integrated Circuits

IP.com Disclosure Number: IPCOM000078177D
Original Publication Date: 1972-Nov-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 3 page(s) / 43K

Publishing Venue

IBM

Related People

Bertolino, R: AUTHOR [+2]

Abstract

In the wiring of integrated circuits, it is a standard practice in computer-aided design for the designer to lay out his proposed wiring pattern on a fixed grid wherein the wiring is accomplished along fixed X and Y coordinates, as shown in Fig. 1. The wiring must lay along fixed X and Y channels along such fixed coordinates, as shown in Table 1 which follows. The coordinates given in this table are relative to the grid pattern in Fig. 1.

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Laying Out Wiring for Design Automation of Integrated Circuits

In the wiring of integrated circuits, it is a standard practice in computer-aided design for the designer to lay out his proposed wiring pattern on a fixed grid wherein the wiring is accomplished along fixed X and Y coordinates, as shown in Fig. 1. The wiring must lay along fixed X and Y channels along such fixed coordinates, as shown in Table 1 which follows. The coordinates given in this table are relative to the grid pattern in Fig. 1. Table 1 Coordinate Conversion

X Channel Coordinate Y Channel Coordinate 1 100 1 100

2 150 2 150

3 200 3 200

4 250 4 250

5 300 5 300

6 350 6 450

7 400 7 500

8 450 8 550.

In addition, "sockets", which are terminal points for the wiring in the circuit, are also located by such fixed X,Y coordinates as set forth in Table 2 below, which is related to Fig. 1. Table 2 Socket Position

Socket No. X Loc. Y. Loc.

1 100 1200

2 350 1200

3 600 1200

4 850 1200

5 100 900.

However, in the process of wiring up an integrated circuit, there are quite often areas of congestion of wiring due to the placement of circuits. Such congestion often requires additional channels in certain areas and less channels in others. With present day integrated circuit technology, the designer often has such flexibility, and circuit units or rows in the layout may be shifted to accommodate such additional channels. In anticipation of such flexibility, it is therefore desirable to use in the laying out of the chip, wiring channels and socket locations which, instead of being along fixed coordinates, as shown in Fig. 1, are flexible in location and may be used relative to the proposed movement of circuit unit rows and columns.

A desirable chip layout format, which has both wiring channels and socket locations with flexible positions relative to the positions of the circuit rows or columns, is shown in Fig. 2.

The advantage of utilizing the layout format shown in...