Browse Prior Art Database

Bistable Resistance Memory Cell

IP.com Disclosure Number: IPCOM000078202D
Original Publication Date: 1972-Nov-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 56K

Publishing Venue

IBM

Related People

Cole, JN: AUTHOR [+3]

Abstract

A memory using a bistable resistance element 1 in series with a diode 2, has been shown in the IBM Technical Disclosure Bulletin, Vol, 13, No. 5, October 1970, at pages 1189 and 1190. A schematic diagram of the memory is shown in Fig. 1, in which the memory cell comprising bistable resistance 1 and diode 2 is connected across the X lines X1, X2,...XN and the Y lines Y1, Y2,...YN. The bistable resistance device 1 is, for example, a niobium oxide device.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 72% of the total text.

Page 1 of 2

Bistable Resistance Memory Cell

A memory using a bistable resistance element 1 in series with a diode 2, has been shown in the IBM Technical Disclosure Bulletin, Vol, 13, No. 5, October 1970, at pages 1189 and 1190. A schematic diagram of the memory is shown in Fig. 1, in which the memory cell comprising bistable resistance 1 and diode 2 is connected across the X lines X1, X2,...XN and the Y lines Y1, Y2,...YN. The bistable resistance device 1 is, for example, a niobium oxide device.

Shown in Figs. 2 and 3 are embodiments for the memory array of Fig. 1, in which the same materials are used for both the bistable resistance 1 and the diode 2. This simplifies packaging and uses related technologies to fabricate the entire memory cell.

In Fig. 2, a substrate 3 has deposited thereon niobium conductors 4. An insulating Nb(2)O(5) layer 5 is formed over conductive layers 4. After this, bismuth conductive strips 6 are deposited over layer 5. Electrodes 4 and 6 together with insulator 5 comprise the diode 2 shown in Fig. 1. The bistable resistance 1 is comprised of Nb layer 7, Nb(2)O(5) layer 8, and the top layer 9 of Bi.

Fig. 3 shows an alternate embodiment in which the diode comprises a Nb top layer, rather than the bismuth layer 6 shown in Fig. 2. Substrate 3 has deposited thereon first niobium strips 10. An insulating layer 11 of Nb(2)O(5) is formed over the strips, after which dots 12 of Nb are deposited onto oxide layer 11. These dots are diffused into oxide layer 11...