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Differential Triple Ramp Converter

IP.com Disclosure Number: IPCOM000078224D
Original Publication Date: 1972-Dec-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

Vautier, R: AUTHOR

Abstract

The well-known technique of the triple-ramp converter consists of charging an integrator with a current proportional to the voltage to be coded, and in discharging it with two different currents in a suitable ratio.

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Differential Triple Ramp Converter

The well-known technique of the triple-ramp converter consists of charging an integrator with a current proportional to the voltage to be coded, and in discharging it with two different currents in a suitable ratio.

But this technique shows several error sources. First of all, when a current is switched for discharging the integrator, a delay appears which results in an error in the time necessary to discharge the integrator. The same error occurs on switching from the greatest current source to the smallest one. Secondly, at the end of the conversion, a comparator is used to inhibit the smallest current. The delay introduced by the comparator causes an error in the counter due to overcount. Thirdly, when the integration is performed by an amplifier with a feedback capacitor, an offset current is drawn to the input of the amplifier.

All these errors are systematic errors which always occur in the same sense. Therefore, it is possible to cancel these errors by carrying out two conversions in series. The signal to be coded VX is superposed with a DC component V). The conversion is made in six different phases. During B1, beginning at time T0, the signal V=VX+VO is integrated. During Phi 2, the integrator is discharged and the high section C1 of a counter C counts up on the most significant bits. During Phi 3, the integrator is discharged and the whole counter C including the high section C1 and the low section C2 is decremented. A...