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Storing Control Words With Length Not on Binary Byte Boundaries

IP.com Disclosure Number: IPCOM000078233D
Original Publication Date: 1972-Dec-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 5 page(s) / 94K

Publishing Venue

IBM

Related People

Drimak, EG: AUTHOR [+2]

Abstract

Described is a method of loading a resident control storage 1 (Fig.1) and of paging nonresident control words that are not on binary byte boundaries, from a main store 2 to a control word paging buffer 3.

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Storing Control Words With Length Not on Binary Byte Boundaries

Described is a method of loading a resident control storage 1 (Fig.1) and of paging nonresident control words that are not on binary byte boundaries, from a main store 2 to a control word paging buffer 3.

With a minimum amount of control hardware, it is possible for a processor to efficiently use control storage words having 42-data bits with a main memory having a 128-data bit interface.

Each control word has 42-data bits (0 to 41) and 6-parity hits (P0-P5), for a total of 48 bits. The main memory has 128-data bits (0-127) and 16-parity bits (P0-P15), a total of 144 bits. Thus, 3 control words exactly fit into one 16-byte main memory word. The bit-for-bit mapping is as follows:

Main Memory Bits Control Word Number Control Word Bits

0-39 0 0-39

40-79 1 0-39

80-119 2 0-39

120, 121 0 40, 41

122 1 P5

123, 124 1 40, 41

125 2 P5

126, 127 2 40, 41

P0-P4 0 P0-P4

P5-P9 1 P0-P4

P10-P14 2 P0-P4

P15 0 P5.

This mapping takes advantage of the fact that if main memory bit 122 is parity for bits 123 and 124 and bit 125 is parity for bits 126 and 127, bit P15 is both the correct parity for bits 120 and 121 and for bits 120-127.

The control words are mapped into main memory in control storage modules, containing 64 logically contiguous control words. To achieve maximum main memory utilization, 3 modules are mapped into each 1,024 bytes of main memory. Table 1 (below) illustrates modules 1, 2, and 3, each containing control words 0-63, mapped into 64 main memory words, identified by hex addresses 00-3F.

In general, some part of the total control words in main memory would initially be transferred to the higher speed control storage 1. This would be the resident portion of control storage and would contain the more essential code required. The remainder of the control words required are contained in the nonresident portion of control storage, i.e. the main memory.

Each time a nonresident control word is required, it is paged from the main memory into the control word paging buffer 3 by way of a shifter 4. This buffer holds the three control words of the 16 byte main memory word containing the required control word.

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To load the resident portion of 1, control word 0 is written without a data shift, gating bits P15, 120, 121 by a 3-way assembler 5. Then the contents of the shifter are shifted left 5 bytes, and control word 1 is written, gating bits 82-84 via the assembler. Finally control word 2 would be written, after another left shift of 5 bytes, gating bits 45-47 via the assembler.

When paging a nonresident control word for execution, the shifter output is read directly into the control word paging buffer.

To execute a control word, the word is either obtained from 3 or 1 via an assembler 6 whose output goes to the control register 7.

Because a nonbinary byte boundary is used, a translation must be performed from the logical address contained in the control storage addres...