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Differential Simultaneous Send Receive Circuit

IP.com Disclosure Number: IPCOM000078325D
Original Publication Date: 1972-Dec-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Hlasnicek, RS: AUTHOR [+2]

Abstract

In the circuit shown, transistors T9, T10 along with transistors T11 and T12, provide a differential amplifier-used to drive a transmission line connected at nodes 100 and 102. Resistors RT1 and RT2 are terminating resistors for the transmission line.

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Differential Simultaneous Send Receive Circuit

In the circuit shown, transistors T9, T10 along with transistors T11 and T12, provide a differential amplifier-used to drive a transmission line connected at nodes 100 and 102. Resistors RT1 and RT2 are terminating resistors for the transmission line.

Resistors RL1 and RL2 are used to provide a current source input to the differential amplifier made up of transistors T3 and T4. Differential amplifier T3 and T4 receives signals from the transmission line via nodes 100 and 102. The amplified received signal is taken from the differential amplifier T3 and T4 via the emitter-followers, transistors T1 and T2.

A current switch made up of transistors T6 and T7 is used to compensate the change of current at the bases of transistors T3 and T4, caused by a signal being driven out or sent out on the transmission lines by transistors T9, T10, and T11, T12. Thus, the differential amplifier T3 and T4 will respond only to a differential signal coming in from the transmission line and not to the differential signal being driven out on the line by transistors T9, T10, and T11, T12.

Transistor T8, resistor R2, and RE2 make up a level translating network and buffer used to provide a reference voltage for driving half of the differential amplifier T9, T10, and T11, T12, along with half of the compensation amplifier T6 and T7. The other half is driven by a corresponding level translating network made up of transistor T5, resistors R1 and...