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Semiconductor Devices having Minimum Series Collector Resistance

IP.com Disclosure Number: IPCOM000078362D
Original Publication Date: 1972-Dec-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Putney, ZC: AUTHOR [+2]

Abstract

Relatively thick silicon wafers may be processed to minimum thickness by laser scribing and backside etching. The thinned wafer will have reduced series collector resistance.

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Semiconductor Devices having Minimum Series Collector Resistance

Relatively thick silicon wafers may be processed to minimum thickness by laser scribing and backside etching. The thinned wafer will have reduced series collector resistance.

In Fig. 1, a relatively thick silicon wafer 10 of 38 microns thickness is laser or electron-beams scribed to form channels 12 after processing for circuit formation. The depth of the channels may be accurately controlled by the period and intensity of the electron or laser beam. The depth of the channel should equal the desired thickness of the device. The scribed surface of the wafer 10 is coated with wax or other acid resistance material 18, as shown in Fig. 2. The wafer is attached to a backing material, i.e. MYLAR* 14 for processing of the exposed surface 16. In one form a suitable etch, e.g. iodine B may be employed to remove silicon until the channels 12 are reached. One etch rate found to be satisfactory is about 0.1 mil per minute. The etch rate may be improved if the surface 16 is lightly abraded prior to etching. The abrading removes any silicon dioxide and/or other material which would inhibit efficient and uniform etching of the silicon to reach the channels 12, as shown in Fig. 3.

Etching is preferred because the device side of the wafer is the only reference base used, and device thickness is therefore held within parallelism tolerances of the coated and exposed surfaces. In abrading, the flatness of the device mo...