Browse Prior Art Database

Selective System Delay Device

IP.com Disclosure Number: IPCOM000078392D
Original Publication Date: 1972-Dec-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 3 page(s) / 32K

Publishing Venue

IBM

Related People

Larson, LE: AUTHOR

Abstract

Device 10 allows IBM System/370 (or comparable system) to simulate design changes, so that the effect on system performance can be predicted. Device 10 induces specific delays into execution of test programs when processor 12 addresses specific storage locations. The specified delays relate to calculated execution times of proposed program subroutines. By inducing a series of delays while measuring system performance, it is possible to predict how system performance is affected by proposed design changes.

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Selective System Delay Device

Device 10 allows IBM System/370 (or comparable system) to simulate design changes, so that the effect on system performance can be predicted. Device 10 induces specific delays into execution of test programs when processor 12 addresses specific storage locations. The specified delays relate to calculated execution times of proposed program subroutines. By inducing a series of delays while measuring system performance, it is possible to predict how system performance is affected by proposed design changes.

The figure shows how the existing IBM System/370 address compare circuit 14 can be used to momentarily stop processor 12, when a reference is made to a specific storage location. When an address comparison occurs, the circuit sets two latches, `processor stop' 16 and `address compare light' 18. Upon sensing the `light on' condition, the pulse delay device 10 begins timing a specific delay period, then upon expiration of this period, the delay device issues a pulse to reset the `processor stop' latch 16.

The essential elements mentioned for implementation of the delay function can be supplanted by equivalent elements. For example:
1) An address compare circuit could be included in the

pulse delay device 10 to sense specific references to

storage addresses. Upon comparison, the circuit would

set processor stop latch 16 and start the pulse delay

device.
2) Processor stop latch 16 could be replaced by a circuit

which inhibits CPU clock cycles of the processor.
3) The pulse delay device 10 can take many forms, such as

a simple capacitor-resistor delay circuit (switchable),

or a Schmidt trigger circuit with switchable timing

capacitors, or a pulse counter whic...