Browse Prior Art Database

Bipolar Dynamic Shift DC Store Shift Register

IP.com Disclosure Number: IPCOM000078403D
Original Publication Date: 1972-Dec-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Pleshko, P: AUTHOR

Abstract

In Fig. 1A, inverter transistors Q1 and Q2 are cross-coupled by Q4 and Q5 to form a stable flip-flop for static storage. When new information is to be shifted in, both Q4 and Q5 are turned off in accordance with the signal waveforms phi F and phi 2M, as shown in FIG. 2. This tends to turn off both transistors Q1 and Q2. However, since the base impedance in this condition is very high, the recovery of a transistor that was on, to the off condition, is very slow. Accordingly, the output remains fixed for a relatively long period of time.

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Bipolar Dynamic Shift DC Store Shift Register

In Fig. 1A, inverter transistors Q1 and Q2 are cross-coupled by Q4 and Q5 to form a stable flip-flop for static storage. When new information is to be shifted in, both Q4 and Q5 are turned off in accordance with the signal waveforms phi F and phi 2M, as shown in FIG. 2. This tends to turn off both transistors Q1 and Q2. However, since the base impedance in this condition is very high, the recovery of a transistor that was on, to the off condition, is very slow. Accordingly, the output remains fixed for a relatively long period of time.

If the input is low, and transistor Q1 was previously on, Q1 turns off relatively rapidly when phi 1 turns transistor Q3 on, since the base of transistor Q1 discharges through the collector-emitter impedance of transistors Q3 and Q2, of the input shift register stage. Thus, information is transferred during a phi 1 pulse to transistor Q1, and then to transistor Q2 when phi 2M goes positive. While information is being shifted, it also is being regenerated. When shifting stops, both transistors Q4 and Q5 turn on, and retain the information state, statically. Transistor Q6 is added, for taking the output in parallel from each stage.

Figs. 1B and 1C utilize essentially the same concept as the register shown in Fig. 1A, with some changes in implementation. In Fig. 1B, the bass-emitter junction of transistors Q3, Q4, and Q5, connected to bass contacts, should be larger than the base-emitter j...