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Read Only Memory Fabrication by Laser Formed Connections

IP.com Disclosure Number: IPCOM000078426D
Original Publication Date: 1973-Jan-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 3 page(s) / 52K

Publishing Venue

IBM

Related People

Cook, PW: AUTHOR [+2]

Abstract

Two basic approaches to read-only memory (ROM) manufacture are proposed. The first, suitable for very limited production items, involves total personalization of the ROM subsequent to wafer processing. The second allows for post-processing changes to be made in an ROM. A. Basic ROM

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Read Only Memory Fabrication by Laser Formed Connections

Two basic approaches to read-only memory (ROM) manufacture are proposed. The first, suitable for very limited production items, involves total personalization of the ROM subsequent to wafer processing. The second allows for post-processing changes to be made in an ROM. A. Basic ROM

Fig. 1 shows a typical ROM for complete personalization. Storage is by a single cell, T1 or T2, used for isolation. The indicated sense and decode scheme, shown for illustrative purposes, operates as follows:

1) Precharge -- By appropriate pulsing of A and B, the y lines are all precharged through Q1 to some potential. This does not represent excessive current as this happens in full only on one y line, the others having been charged during a previous cycle. Decoding, if clocked, may be simultaneous with this operation. Device Q2 is OFF.

2) y-select -- Q1 is turned OFF and the potential at C brought to ground, allowing Q2 to turn ON. Such turn on will occur only at the selected line. The selected line is brought to zero. Q2 is then turned off, OFF, for example, by clamping decoder output to ground.

3) Read -- By means of the x decoders, one x line is turned ON. ON the selected y line, Q3 is turned ON only if a 1 (connection) exists in bit cell T1 at (x,y), otherwise, Q3 remains OFF. Thus, the output at the drain of Q3 is low for all unselected y lines, and is high for the selected y line only when a O (disconnection) exists in cell T1. Outputs of all y lines are connected to a NOR circuit to provide a single output representing the desired bit.

Crucial to the operation of this (or any) ROM is the bit cell. In Fig. 1, a binary 1 is indicated by a connection at a...