Browse Prior Art Database

Resynchronizer

IP.com Disclosure Number: IPCOM000078597D
Original Publication Date: 1973-Feb-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

King, JH: AUTHOR [+2]

Abstract

Numerous systems exist in which a first, or "start", input signal initiates a sequence of sample pulses or windows, which in turn are used to sample the following input signals. A sample pulse coincident with an input signal is a "1"; a sample pulse with no input signal is a "0".

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Resynchronizer

Numerous systems exist in which a first, or "start", input signal initiates a sequence of sample pulses or windows, which in turn are used to sample the following input signals. A sample pulse coincident with an input signal is a "1"; a sample pulse with no input signal is a "0".

In practical situations, the input signals and sample pulses can shift or drift with respect to each other. Ultimately, an input signal and sample pulse may fail to synchronize.

The present arrangement overcomes these problems by providing that a sample pulse is generated from the previous sample pulse if the previous pulse did not sample an input signal, or from the previous input signal.

The start of the input signal will gate clock pulses to the binary counter 3. Every second clock pulse will thus reach the X counter 5 until the end of the input signal. At this time, every clock pulse will reach the X counter 5 via AND circuit
7. FF1(9) prevents clock pulses from reaching the X counter before the start of the input signal.

In previous signal timing circuits, the value of the X count determined when the sample pulse occurred, that is, the delay from the input signal to the sample pulse. In the prior arrangement, in which two successive input signals may be used to gate pulses to the counter, a new sequence would start before the previous one was completed. Therefore, in the present arrangement, if the total count desired is X + Y, the counters are cascaded in two stages: At...