Browse Prior Art Database

Memory Module

IP.com Disclosure Number: IPCOM000078657D
Original Publication Date: 1973-Feb-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Archey, WB: AUTHOR

Abstract

This integrated circuit package provides a full byte of memory interface in a single unit.

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Memory Module

This integrated circuit package provides a full byte of memory interface in a single unit.

Module 1 comprises a plurality of integrated circuit substrates 2, upon which are mounted memory array chips 3. Memory systems access data in units called bytes, typically containing nine bits of binary information. By organizing the memory package to provide the same unit of data required by the system, packaging densities are increased while plug-in card area and wiring are not increased per module, over conventional horizontal memory chip packages. The module 1 contains nine stacked array chips 3 driven simultaneously. In order to provide the required number of vertical connections, approximately 50, two rows of contact pins 4 and risers 5 are required. Card wiring complexity is minimized by virtue of the parallel risers. A universal substrate 2 is used and is personalized after chip mounting.

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