Browse Prior Art Database

Bidirectional FET Shift Register

IP.com Disclosure Number: IPCOM000078724D
Original Publication Date: 1973-Feb-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Kemerer, DW: AUTHOR

Abstract

This static field-effect transistor (FET) shift register circuit provides reversible operation as well as data retention.

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Bidirectional FET Shift Register

This static field-effect transistor (FET) shift register circuit provides reversible operation as well as data retention.

The two-stage circuit stores or shifts data and its complement, forward or backward at the command of four phase lines. If data is to be shifted in only one direction, only two phase lines are required. Each stage of the shift register comprises six devices. The various modes of operation are described below.

Shift forward. -- In order to read data into the first stage, phase lines 03 and 01 are up while phase lines 02 and 04 are down.

Devices 1 and 2 will be on, allowing data to be stored on cross-coupled devices 3 and 4 when 03 is brought down. This first stage is isolated from preceding stages by lowering 01, to turn off devices 1 and 2. Information may be stored indefinitely or shifted to the second stage by raising 04 to destroy existing data, then raising 02 and following the sequence described above for 03 and 01, respectively.

Shift backward. -- If data is to be shifted backward, phi 1 and 02 phase pulses are interchanged allowing devices 1' and 2' to be conductive, while devices 1 and 2 are rendered nonconductive.

In order to shift in one direction only, 03 may be combined with 01 and 04 combined with 02. This will allow forward shifting. To shift backwards only, 04 is combined with 01 and 03 is combined with 02.

This circuit allows maximum flexibility of operation, including the storage of data and it...