Browse Prior Art Database

Automated Test Pattern Generation Algorithm Using Boolean Difference Technique for Combinational Logic Networks

IP.com Disclosure Number: IPCOM000078755D
Original Publication Date: 1973-Mar-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Cho, JW: AUTHOR [+2]

Abstract

This test pattern generation algorithm uses the Boolean Difference Theory and a pattern minimization technique, to calculate a minimal of test patterns for maximum testability on combinational logic networks. The reduction in the number of test patterns contributes to the reduction in the cost of testing the logic networks. The deterministic algorithm which generates test patterns for stuck-fault conditions is shown in the diagram in Fig. 1. The program takes logic description as input data, Block 1, and generates in Block 2 the Boolean function of an output of the circuit. Each output of a logic block can be expressed in terms of its inputs by a simple Boolean expression.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 58% of the total text.

Page 1 of 2

Automated Test Pattern Generation Algorithm Using Boolean Difference Technique for Combinational Logic Networks

This test pattern generation algorithm uses the Boolean Difference Theory and a pattern minimization technique, to calculate a minimal of test patterns for maximum testability on combinational logic networks. The reduction in the number of test patterns contributes to the reduction in the cost of testing the logic networks. The deterministic algorithm which generates test patterns for stuck- fault conditions is shown in the diagram in Fig. 1. The program takes logic description as input data, Block 1, and generates in Block 2 the Boolean function of an output of the circuit. Each output of a logic block can be expressed in terms of its inputs by a simple Boolean expression. Since each input to a logic block is an output from a previous logic block or a primary input, the Boolean description of any output can be expanded until it is expressed in terms of primary inputs. This is known as the fold-back method.

To generate test patterns, Boolean differences are calculated in Block 4 to sensitize the output to each signal path. For each output, the fold-back method uses all the possible paths to primary inputs. These paths are considered one at a time, and the Boolean difference of the output due to that path, is calculated from the definition of the Boolean difference and the chain rule. However, the chain rule has to be applied only if these is a reconverg...