Browse Prior Art Database

Field Effect Transistor Gate Gettering by Ion Implantation

IP.com Disclosure Number: IPCOM000078768D
Original Publication Date: 1973-Mar-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Regh, J: AUTHOR

Abstract

In field-effect transistor technology, it is known to stabilize the threshold voltage in the gate by including in the dielectric gate structure, borosilicate glass and/or phosphate silicate glass. Usually, these films are deposited from the gas space at high temperatures.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Field Effect Transistor Gate Gettering by Ion Implantation

In field-effect transistor technology, it is known to stabilize the threshold voltage in the gate by including in the dielectric gate structure, borosilicate glass and/or phosphate silicate glass. Usually, these films are deposited from the gas space at high temperatures.

In this technique, the field-effect transistor gate structure containing a thin dielectric gate layer of SiO(2), Si(3)N(4), or some other suitable dielectric, is bombarded with boron or phosphorous ions to obtain a high-dopant concentration within the dielectric. As indicated in the figure, curve 10 indicates the profile of the boron or phosphorous ions in the dielectric layer 12, which profile also extends into the Si body 14. A moderate heat cycle following the bombardment will convert the boron and phosphorous to borosilicate glass and phosphosilicate glass for gettering purposes. The bombardment is preferably tailored to produce a boron or phosphorous ion distribution in the upper surface of the silicon in the gate region, which can be used to adjust the threshold voltage.

1

Page 2 of 2

2

[This page contains 2 pictures or other non-text objects]