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Bidirectional Input/Output Terminals

IP.com Disclosure Number: IPCOM000079042D
Original Publication Date: 1973-Apr-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Goel, P: AUTHOR [+2]

Abstract

This is a technique for using output terminals as input terminals and vice versa, thereby improving the testability of complex circuits having large numbers of inaccessible circuit nodes.

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Bidirectional Input/Output Terminals

This is a technique for using output terminals as input terminals and vice versa, thereby improving the testability of complex circuits having large numbers of inaccessible circuit nodes.

Sequential random-logic circuits produced by large-scale integration (LSI) are difficult to test, because of large numbers of inaccessible circuit nodes. The present technique adds additional logic circuits to the existing LSI circuit, in order to give flexibility to desired input and output terminals during test. The additional circuits are disabled during normal operation.

As illustrated in Fig. 1, terminal T1 is normally an output terminal of the logic circuit. OR circuit 10 normally has only one input A1 from a particular point within the LSI circuit. OR circuit 10 then drives the signal from A1 to a sufficiently high- output level at output terminal T1. By the present technique, OR circuit 10 is provided with a second input C1, which is brought to a "1" level, if the desired test is to be implemented. Accordingly, during such a test the input to DOT AND 1 will be forced to a 1 level by C1, negating the level of A1. If T1 is also at a 1 level then a 1 input will be provided to OR circuit 12. Otherwise, a "0" input will be provided to OR circuit 12.

The second input to OR circuit 12 is complement C1 which is at the 0 level during test. Therefore, the output of OR circuit 12 will be at the level of T1, providing one of the inputs to DOT AND...