Browse Prior Art Database

Multiaccess Bipolar Memory Cell

IP.com Disclosure Number: IPCOM000079048D
Original Publication Date: 1973-Apr-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Kolankowsky, E: AUTHOR [+2]

Abstract

This circuit can be simultaneously interrogated by two different address selection systems.

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Multiaccess Bipolar Memory Cell

This circuit can be simultaneously interrogated by two different address selection systems.

The cell is selected for reading by applying a negative pulse to the K drive terminal 10 and a positive pulse to either the H drive terminal 12 or the V drive terminal 14, depending on whether reading is to be performed in the "horizontal" or "vertical" dimension.

Assuming the horizontal direction has been selected for reading, the data stored in the cell can be differentially sensed at the BH0 and BH1 terminals. For instance, if the collector current of transistor TH1 is greater than the collector current of transistor TH0, this indicates that transistor T2 is conducting and a binary "1" is stored in the storage cell.

Writing into the cell is performed by again applying a negative pulse to the K drive terminal 10, while a positive pulse is applied to either the H drive terminal 12 or the V drive terminal 14. At the same time, one of the bit lines in the selected dimension is reduced to complete the write function. For instance, assume that a binary 1 is to be stored in the cell through the horizontal direction. Then the bit line BH1 is lowered as opposed to the bit line BH0 to turn transistor T2 on.

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