Browse Prior Art Database

One Level XOR

IP.com Disclosure Number: IPCOM000079060D
Original Publication Date: 1973-Apr-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Lavellee, RW: AUTHOR

Abstract

The XOR (exclusive OR) of two single-phase inputs is performed in one level. Logically, it is implemented by the collector dot (AND) of a TTL (transistor-transactor logic) circuit (AND-INVERT) and the in-phase collector output of a current switch (OR). A + B = A B (A + B).

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One Level XOR

The XOR (exclusive OR) of two single-phase inputs is performed in one level. Logically, it is implemented by the collector dot (AND) of a TTL (transistor- transactor logic) circuit (AND-INVERT) and the in-phase collector output of a current switch (OR). A + B = A B (A + B).

Perfornances approaching 1 ns can be achieved by using Schottky clamped TTL and small resistors.

Two versions allow ECL (emitter-coupled logic) inputs (Fig. 1) or TTL inputs (Fig. 2), and each provides ECL or limited TTL outputs.

Multibit comparators can be implemented with little added delay by simply DOT-ORing the ECL outputs.

Also, multibit XOR's can be implemented by connecting individual XOR's in a tree structure. Interfaces between levels can be TTL-connected (no emitter- followers) in order to reduce power dissipation and improve performance. In this case, the driving collector resistor will have to be increased to allow the driving current switch to sink the driven TTL load current. For the logical condition where the TTL load is not present (other input to the driven circuit is also down), the two diodes from ground to output of the driving circuit are an adequate clamp and will supply the missing load current, in order to maintain the proper output level.

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