Browse Prior Art Database

Divide by "N" Intelligent Probe

IP.com Disclosure Number: IPCOM000079118D
Original Publication Date: 1973-May-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Garcia, LC: AUTHOR [+2]

Abstract

For use with testing equipment, a probe is provided with inbuilt scalar logic permitting a high-frequency input signal to be scaled down in frequency by some finite ratio. The probe can be connected to high-speed digital computers and pass scaled down signals to lower speed monitor circuits, without losing the significance of incoming data.

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Divide by "N" Intelligent Probe

For use with testing equipment, a probe is provided with inbuilt scalar logic permitting a high-frequency input signal to be scaled down in frequency by some finite ratio. The probe can be connected to high-speed digital computers and pass scaled down signals to lower speed monitor circuits, without losing the significance of incoming data.

Within the confines of the probe, an input network 10 receives the monitored high-speed signal, a differential comparator 20 amplifies the signal and passes it to a divide-by-N integrated circuit module 30 for scaling down the input frequency by a finite factor, and an output amplifier 40 drives a transmission line C connecting the probe to test equipment.

An "intelligent" capability can be built into the probe through the provision of an input line B and an AND gate 50, whereby a logic state 1 applied to B enables an output at C scaled down by a factor N. By applying a known pulse frequency at B, to beat periodically with the input signal at 50, a further reduction in output frequency at C can be achieved. By applying a logic state 0 at B, pulse transmission to the monitor can be halted and pulse transmission can also be reset/stopped if a logic state 0 is applied at A. Thus, the probe can be controlled to a degree from the monitor.

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