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Two Phase Bipolar Circuits

IP.com Disclosure Number: IPCOM000079166D
Original Publication Date: 1973-May-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Pricer, WD: AUTHOR

Abstract

Large-scale integration of bipolar circuits can be facilitated by use of polyphased logic and support circuits. A logic tree, realizing these benefits, is shown in the figure, and shows two NOR circuits 10 and 12, using NPN transistors 14 and 16, driving a NOR circuit 18 using a PNP transistor 20. Each NOR circuit 10 comprises an NPN transistor 14 having a pair of diodes 21 and 22 coupled to its base 23 and through a capacitor 24 to ground. A clocked voltage V-1 is applied to the emitter of the transistor 14. The collector of transistor 14 is coupled through a diode 26 to an output line 29. Another diode 27 is connected between line 29 and the base of transistor 20 in NOR circuit 18.

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Two Phase Bipolar Circuits

Large-scale integration of bipolar circuits can be facilitated by use of polyphased logic and support circuits. A logic tree, realizing these benefits, is shown in the figure, and shows two NOR circuits 10 and 12, using NPN transistors 14 and 16, driving a NOR circuit 18 using a PNP transistor 20. Each NOR circuit 10 comprises an NPN transistor 14 having a pair of diodes 21 and 22 coupled to its base 23 and through a capacitor 24 to ground. A clocked voltage V-1 is applied to the emitter of the transistor 14. The collector of transistor 14 is coupled through a diode 26 to an output line 29. Another diode 27 is connected between line 29 and the base of transistor 20 in NOR circuit 18.

NOR circuit 12 is identical to NOR circuit 10, except that its output 29' is coupled to the other input diode 27' of the NOR circuit 18. The input diodes 27 and 27' of NOR circuit 18 are also coupled through a capacitor 28 to ground. The emitter 30 of transistor 20 of NOR circuit 18 is coupled to a clocked voltage V-2, and its collector is coupled through a diode 34 to its output 36. A pulse appearing on any one of the inputs A, B, C, or D which comprise the inputs of NOR circuits 10 and 12, respectively, will cause the respective capacitor to which they are coupled to charge to the level of the input pulse.

Thus, if it is assumed, for example, that a positive pulse 40 of about 5 volts is applied to input A, capacitor 24 will charge up to approximately the 5 volt level of the pulse 40. Since the emitter of transistor 14 is normally held positive by the applied vo...