Browse Prior Art Database

Interconnection for Stacked Substrates Having Integrated Chips

IP.com Disclosure Number: IPCOM000079257D
Original Publication Date: 1973-Jun-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Mescia, NC: AUTHOR [+2]

Abstract

As shown in Fig. 1, a ceramic substrate 10 is processed to provide via or vertical interconnections therethrough. Using any number of well-known techniques a chrome-copper-chrome metallization pattern 12, 14, and 16, respectively, is deposited in any desired configuration over the upper surface 18 of the ceramic substrate 10 and into the via holes, one of which is shown at 20. Thereafter, a photoresist masking layer 22 is selectively deposited around the metallized interconnection via 20.

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Interconnection for Stacked Substrates Having Integrated Chips

As shown in Fig. 1, a ceramic substrate 10 is processed to provide via or vertical interconnections therethrough. Using any number of well-known techniques a chrome-copper-chrome metallization pattern 12, 14, and 16, respectively, is deposited in any desired configuration over the upper surface 18 of the ceramic substrate 10 and into the via holes, one of which is shown at 20. Thereafter, a photoresist masking layer 22 is selectively deposited around the metallized interconnection via 20.

Next, as illustrated in Fig. 2, the metallized via is filled with a metal 24. A suitable filler material is a gold-copper alloy. Then, a grinding or other conventional operations are employed to remove the excess metal, illustrated regions 26 and 28, formed during the filling operation. The resulting structure is shown in Fig. 3 and comprises a filler material whose under surface 30 is planar with the under surface 32 of the ceramic substrate 10, and an upper planar surface 34. This upper portion 34 provides a standoff and connecting area, when a plurality of individual ceramic substrates 10 are joined in a stacked relationship. Thereafter, as shown in Fig. 4, the plurality of metallized substrates 10 can be stacked by employing a suitable metallurgical interconnection 38. Numerous techniques exist for forming the interconnection 38, such as preformed, reflow, pressure, diffusion bonding, or localized molten bonding...