Browse Prior Art Database

Gate Oxide Defect Detection

IP.com Disclosure Number: IPCOM000079373D
Original Publication Date: 1973-Jun-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Lynch, DJ: AUTHOR [+3]

Abstract

Gate oxide defects in field-effect transistor (FET) devices may be located and morphologically located through a process of illuminating the failed area using liquid crystals, and thereafter viewing the defect through a scanning electron microscope after physically locating the defect within a plated area.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 72% of the total text.

Page 1 of 1

Gate Oxide Defect Detection

Gate oxide defects in field-effect transistor (FET) devices may be located and morphologically located through a process of illuminating the failed area using liquid crystals, and thereafter viewing the defect through a scanning electron microscope after physically locating the defect within a plated area.

A gate oxide defect is identified in the x and y directions, by applying a carbon (soot) coating over the quartz passivation layer on the device in question. This is performed in situ in the module. The carbon coating serves as a back drop for viewing the defect area of the gate oxide. A coat of unblackened liquid crystals, active in the temperature range of 40 to 41 degrees C, is applied to the surface of the gate electrode. An electrical bias is applied to the FET while directing a light source with a heat filter on the gate electrode. The bias is turned on and off at approximately 2 to 4 second intervals. The defect site will appear as a bright flash of light against the nonchanging surface of the surrounding gate electrode area. The light is readily observable through a stereoscopic microscope. This process locates the defect with respect to the x and y (horizontal) device geometry, but the z (vertical) location of the defect must now be determined.

The passivating layer, e.g., quartz and the aluminum electrode are removed from the gate oxide by suitably etching and cleaning techniques. The device is copper decorated by applying...