Browse Prior Art Database

Large Area Scanner

IP.com Disclosure Number: IPCOM000079386D
Original Publication Date: 1973-Jun-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Bankowski, WF: AUTHOR [+2]

Abstract

An arrangement is provided for designing chips to accommodate all of the image points required by the source, in its short dimension W. The chips would, therefore, have an area W'lambda and it would require several chips layed out in the L' dimension in the image plane, to complete the detector array. The detector chips consist of photosensitive devices arranged in X-Y matrix form, and of sufficient bit density to constitute a small or medium area scanner in themselves.

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Large Area Scanner

An arrangement is provided for designing chips to accommodate all of the image points required by the source, in its short dimension W. The chips would, therefore, have an area W'lambda and it would require several chips layed out in the L' dimension in the image plane, to complete the detector array. The detector chips consist of photosensitive devices arranged in X-Y matrix form, and of sufficient bit density to constitute a small or medium area scanner in themselves.

The array of chips on detector 4 are displaced from the array of chips on detector 3, by a nonintegral fraction of lambda in the L' dimension. This insures that the kerf and chip-gap region in one array will always correspond to an active area in the other array. This will permit utilization of some defective elements on the chips in regions where the active areas overlap on the two arrays.

In operation, the source document 1 is illuminated by a strobed light source 2 of sufficient intensity, to guarantee proper light intensities at both chip detectors 3,4. The lens and phase splitter 5 are held in position at the proper focal length, thereby causing the image to be focused at the chip detectors 3,4. After an integration of a few microseconds, the image is stored on both detector arrays and the light source is turned off.

The array logic 6 of the scanner performs the process of selecting bits from either the chip 1 or chip 2 detector. The array logic 6 thereby compensates for an...