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Browse Prior Art Database

Integrated FET Single Shot

IP.com Disclosure Number: IPCOM000079393D
Original Publication Date: 1973-Jun-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 23K

Publishing Venue

IBM

Related People

Chang, HC: AUTHOR

Abstract

The figure illustrates an integrated field-effect transistor (FET) single-shot circuit which does not require the use of external resistors and capacitors, and which can be embodied on small area of silicon.

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Integrated FET Single Shot

The figure illustrates an integrated field-effect transistor (FET) single-shot circuit which does not require the use of external resistors and capacitors, and which can be embodied on small area of silicon.

In the figure, assume that at time T = 0 the input voltage is low. Whenever the input voltage goes to a higher value, node 2 charges to a value which is slightly less than the value of V(dd) + V(in). This biases device A well into its linear conduction region and node 3 will be charged to almost the input voltage value, provided that the width-to-length ratio to device A is much much greater than the width-to-length ratio of device B. Device C will remain off, because the input voltage to device C and the voltage at node 3 will be less than 1 threshold or turn on voltage.

Device B is chosen as a high-impedance discharge path for discharging node
2. Node 2 will, therefore, continue to discharge and reduce current into node 3 and therefore the voltage at node 3, until the voltage at node 3 drops below the value of V(in) - B(t). B(t) is defined as the threshold voltage of device C. Device C will then start to turn on, which will cause node 3 and node 2 to discharge quickly. This feedback action will cause a quick turn off and the output voltage at node 3 will drop sharply. This action produces from a pulsed input, a square- pulse output of approximately 5 microseconds duration for the device values as follows: width-to-length ratio for...