Browse Prior Art Database

Self Aligned Field Shield Process

IP.com Disclosure Number: IPCOM000079490D
Original Publication Date: 1973-Jul-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Dennard, RH: AUTHOR [+2]

Abstract

A process for the fabrication of a one-device field-effect transistor memory cell is described. The process employs a field shield but eliminates the high-bit line capacitance in known arrangements. Another advantage is that the channel region is self-aligned.

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Self Aligned Field Shield Process

A process for the fabrication of a one-device field-effect transistor memory cell is described. The process employs a field shield but eliminates the high-bit line capacitance in known arrangements. Another advantage is that the channel region is self-aligned.

The process is outlined in Table I as follows:

TABLE I
1) Deposit thick CVD (Chemical Vapor Deposition) oxide 1.
2) Define storage region. (Mask #1)
3) Etch thick oxide 1.
4) Etch silicon 2 (if necessary for alignment).
5) Diffuse storage electrode 3.
6) Etch to remove thick oxide 1.
7) Grow thin silicon dioxide layer 4 (ion implant surface if

necessary).
8) Deposit silicon nitride layer 5.
9) Deposit polysilicon 6 and oxidize to form silicon dioxide

layer 7 (or deposit CVD oxide).
10) Define device regions 8. (Mask #2)
11) Etch polysilicon 6.
12) Deposit thin CVD silicon dioxide layer 9.
13) Define source and drain regions. (Mask #3)
14) Etch silicon dioxide layer 9, silicon nitride layer 5,

silicon dioxide layer 4.
15) Diffuse sources 10 and drains 11 (bit line for

one-device cell).
16) Grow thick oxide 12.
17) Define contact hole regions. (Mask #4)
18) Etch silicon dioxide.
19) Metallize.
20) Define metal regions. (Mask #5)
21) Etch metal.

Figs. 1-4 illustrate the process at various stages of fabrication. The silicon is etched slightly in step number 4 to give a reference location, by causing an indent in the surface of later formed polysilicon layer 6. The process is fl...