Browse Prior Art Database

Semiconductor Device Lifting Mechanism

IP.com Disclosure Number: IPCOM000079547D
Original Publication Date: 1973-Jul-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Krall, B: AUTHOR

Abstract

This approach assists in decreasing the size and magnitudes of voids that occur during the joining of a semiconductor chip 10 to a pinned dielectric ceramic substrate 12. The semiconductor chip 10 is positioned on the ceramic substrate 12 and a metal bridge 14 is placed above the device. The height of the metal bridge 14 is selected such that in an ambient state, a cavity exists between the upper surface of the semiconductor chip 10 and the under surface of the bridge 14. This cavity is filled with a polymer or flux of material schematically represented at 16.

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Semiconductor Device Lifting Mechanism

This approach assists in decreasing the size and magnitudes of voids that occur during the joining of a semiconductor chip 10 to a pinned dielectric ceramic substrate 12. The semiconductor chip 10 is positioned on the ceramic substrate 12 and a metal bridge 14 is placed above the device. The height of the metal bridge 14 is selected such that in an ambient state, a cavity exists between the upper surface of the semiconductor chip 10 and the under surface of the bridge
14. This cavity is filled with a polymer or flux of material schematically represented at 16.

When the assembly is passed through a solder reflow furnace, the flux or polymer will evaporate at the solder reflow temperature, and concurrently therewith the surface tension associated with the reflow of the plurality of solder pads 18, causes the semiconductor device 10 to be raised towards the under surface of the bridge 14 formerly occupied by the nonvolatized flux or solder. This heat exchange effect reduces the cooling rate of the solder pads 18, in order to minimize voids sometimes associated with the solder reflow process.

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