Browse Prior Art Database

Charge Coupled Device using Polycrystalline Silicon Gate Structure

IP.com Disclosure Number: IPCOM000079557D
Original Publication Date: 1973-Jul-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Malaviya, SD: AUTHOR

Abstract

This charge-coupled device (CCD) structure improves charge transfer efficiency and delay, and simplifies the fabrication process.

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Charge Coupled Device using Polycrystalline Silicon Gate Structure

This charge-coupled device (CCD) structure improves charge transfer efficiency and delay, and simplifies the fabrication process.

As illustrated in Figs. 1 and 1A, the gate of each CCD cell is a continuous layer of high-resistivity polycrystalline silicon 17. The gate layer is fabricated over a thin layer of insulation material such as silicon dioxide 21, which overlies the active region of silicon substrate 18. Contacts 13 are fabricated over a thick layer of oxide 20 to prevent accumulation of charge in substrate 18 under the contacts.

As the potential applied to contacts 13 is varied, the potential wells in substrate 18 under the polycrystalline silicon gate vary accordingly. By applying different voltages to adjacent contacts 13, a strong electrical gradient is set up under gate 17 which improves the transfer efficiency as well as the velocity of transfer.

The design flexibility inherent in shaping polycrystalline silicon structures is used to fabricate the gate of Fig. 2, which features regions 22 of large area connected by a region 23 of narrower area. This creates strong pulling effects between the gates with relatively less lateral pull directly under the gate. The reason for this is the large voltage drop in the constricted region 23 and the relatively small drops in regions 22.

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