Browse Prior Art Database

Switchable Diode With Control Electrode

IP.com Disclosure Number: IPCOM000079673D
Original Publication Date: 1973-Aug-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Fowler, AB: AUTHOR

Abstract

A diode is described whose reverse current can be switched to different levels by using a control electrode and which stops at the written level.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 66% of the total text.

Page 1 of 2

Switchable Diode With Control Electrode

A diode is described whose reverse current can be switched to different levels by using a control electrode and which stops at the written level.

Illustratively, the paper by Grove et al, Solid State Electronics, Vol. 9, No. 783 (1966), shows that the reverse current in a planar diode can be varied using a gate structure surrounding the diode, as shown in Fig. 1A, Fig. 1B, and Fig. 1C.

In these figures, the planar diode 1 is formed by n+ semiconductor region 2 and p semiconductor region 3. Cross-hatched region 4 is a depletion region and is a function of the voltage on gate 5, and the voltage applied across diode leads 6, 7. Gate 5 is spaced from the semiconductor regions by a layer 8 of SiO(2) and by a layer 9 of either Al(2)O(3) or Si(3)N(4), or other suitable material.

The reverse current through diode 1 arises partly from carrier generation in the bulk and partly from states on the surface. The latter current is controlled by the voltage on gate 5 and is a maximum when the surface under gate 5 is depleted, as shown in Fig. 1B. The ratio of the current when depleted as compared to that when accumulated or inverted, can be a factor of 10 or more for a "good" surface and if the interface state density is high, it can be greater.

To make a switchable diode, switching from the inversion state (as shown in Fig. 1C) or the accumulation state (as shown in Fig. 1A) under gate 5 to the depletion state (as shown in Fig. 1B), is ca...