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Hall Effect Keyboard Shift Application

IP.com Disclosure Number: IPCOM000079698D
Original Publication Date: 1973-Aug-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Olson, GE: AUTHOR [+2]

Abstract

In certain keyboard applications using a Hall effect keyboard, a data key entry ring or shift register is utilized to sample the output of a given key on a time basis. A separate ring is eliminated by utilizing some of the existing data key hardware to obtain the same end result, while the Hall effect detector logic is used as a shift register to locate closed positions on the keyboard.

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Hall Effect Keyboard Shift Application

In certain keyboard applications using a Hall effect keyboard, a data key entry ring or shift register is utilized to sample the output of a given key on a time basis. A separate ring is eliminated by utilizing some of the existing data key hardware to obtain the same end result, while the Hall effect detector logic is used as a shift register to locate closed positions on the keyboard.

Referring to the drawing, a data key entry shift register embodiment using two stages of a shift register illustrates the manner in which multiple bits are simultaneously shifted. When a data key is depressed, the ring drive is actuated and the first position of the shift register is turned on by a hold signal on line 3, which originates as an output signal from logic AND circuit 5, and is applied to logical OR circuit 7 in position 1 of the shift register. At the same time, an output is generated from amplifier 8 of shift register position 1 on line 9, to start the clock pulses which drive the shift register.

Each position of the shift register comprises a pulse generator, a logical OR circuit, a trigger and an amplifier, the output of which is connected to an associated logical AND circuit. Clock pulses are applied from a source 11 to logical AND circuits, such as AND circuit 13 of stage 1, the output of each AND circuit 13 being applied through an associated inverter 15 to degate the circuit generating the HOLD signal. Each shift register...