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Glitch Detection Circuit

IP.com Disclosure Number: IPCOM000079807D
Original Publication Date: 1973-Sep-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Frushour, JE: AUTHOR

Abstract

A single glitch detection circuit can be used with various logic families, by using an input buffer stage having a field-effect transistor (FET) source follower controlling the base of an emitter-follower.

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Glitch Detection Circuit

A single glitch detection circuit can be used with various logic families, by using an input buffer stage having a field-effect transistor (FET) source follower controlling the base of an emitter-follower.

In the figure, input signals at terminal 1 are propagated through FET source follower 2 and emitter-follower 3. The output of transistor 3 is applied through blocking capacitors 4 to an appropriate negative or positive voltage divider network 5 or 6 which are connected to the set terminals of a latch 7, with the positive voltage divider being connected to the latch through an inverter 8. The latch output is fed to a translator circuit consisting of operational amplifier 9 and two zener diodes 10. The latch 7 is reset via terminal 11.

A large negative going pulse at input 1 cuts off FET source follower 2 resulting in a small negative going pulse on the emitter-follower 3. A large positive going pulse at the input serves to cut off the emitter-follower, due to the drive current limitations of that transistor. The emitter resistor 13 limits the drive capability. This detection circuit can withstand wide voltage swings and provides a high speed, compact and inexpensive circuit, and does not require an unusual number of different supply voltages.

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