Browse Prior Art Database

Two Diode Charge Storage Monolithic Memory Cell

IP.com Disclosure Number: IPCOM000079980D
Original Publication Date: 1973-Oct-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 20K

Publishing Venue

IBM

Related People

Schlig, ES: AUTHOR

Abstract

A two-diode charge storage monolithic memory cell having random-access capabilities is suggested, wherein both diodes are coupled in series between a reference potential and a bit line with a capacitor coupled between the junction of the diodes and a word line.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 78% of the total text.

Page 1 of 2

Two Diode Charge Storage Monolithic Memory Cell

A two-diode charge storage monolithic memory cell having random-access capabilities is suggested, wherein both diodes are coupled in series between a reference potential and a bit line with a capacitor coupled between the junction of the diodes and a word line.

The equivalent circuit of such a memory cell is illustrated, wherein diodes D1 and D2 may be conventional PN junction diodes or any other rectifying diodes with sufficiently high reverse resistance, to retain charge stored on capacitor C for a given length of time. The storage capacitor C may be formed by a thin layer of insulating film between a metal plate connected to the word line and the cathode of D2. The bit line would be a diffusion or isolated region of doped semiconductor and serve as the cathode of D1. The anode of D1 is a diffusion into the bit line.

In a word-organized memory, a word line is pulsed for word selection at which time all bit lines must be at an appropriate potential. In writing the word pulse is bipolar, i.e., 0 to -V to +V to 0. Bit lines are at +2V to write a 1 (charge
C) or at +V to write a 0 (discharge C). In reading, a positive word pulse is applied and all bit lines are set to +V. A binary 1 is sensed as a transient current flow in a low-impedance bit-sense circuit connected to the bit line upon application of the positive word pulse. Since reading is destructive, the information is restored immediately after reading by settin...