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Pseudo Single Phase Josephson Tunneling Device Shift Register

IP.com Disclosure Number: IPCOM000079990D
Original Publication Date: 1973-Oct-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Yao, YL: AUTHOR

Abstract

A shift register stage which consists of two Josephson tunneling devices and two delay elements is shown in Fig. 1. The shift operation is controlled by two current sources I and 1, one of which is the logic complement of the other.

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Pseudo Single Phase Josephson Tunneling Device Shift Register

A shift register stage which consists of two Josephson tunneling devices and two delay elements is shown in Fig. 1. The shift operation is controlled by two current sources I and 1, one of which is the logic complement of the other.

The delay elements can be made of either passive elements such as transmission line or active elements such as another Josephson tunneling device with associated networks. The only requirement is that the delay must be greater than (or at least equal to) the maximum switching time of the Josephson tunneling device state, i.e., the time required for the output current (assuming a step input) to reach its maximum steady-state value. The shift register operation is as follows: 1. Assume all devices are initially in "0" state, i.e., zero drop across each junction. 2. During transient time T1, I is increasing from zero to some full value while I is decreasing from some full value to zero. Assume an input current I in is present. This causes device Q1 to switch to a "1" state and causes an output current to flow to the input of the delay element. If the delay element is not present between Q1 and Q2, the output current may cause Q2 to switch from 0 state to 1 state (it is assumed I cannot drop to zero instantaneously). Because of the delay, Q2 does not switch. 3. During transient time T2, the input current to Q1 drops to zero and Q1 switches to 0 state. However, the input current...