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Minimum Defect Propagation, Enhancement/Depletion Process

IP.com Disclosure Number: IPCOM000080022D
Original Publication Date: 1973-Oct-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Dennard, RH: AUTHOR [+2]

Abstract

A process is described for making enhancement/depletion mode devices, which enhance yield by not propagating mask defects. Analysis of the process steps shows that unless a mask defect falls in a small susceptible area (low probability), the defect is not critical. For instance, a defect in the third mask utilized in the process would have to fall in a channel region of an enhancement mode device to be critical; a defect in any other area will have no effect. Since the ratio of an enhancement mode channel region area to the total area is small, the probability of a defect falling in the channel region is also small. As a result, yield increases. Other mask levels utilized in the process also have low probability of critical mask defects.

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Minimum Defect Propagation, Enhancement/Depletion Process

A process is described for making enhancement/depletion mode devices, which enhance yield by not propagating mask defects. Analysis of the process steps shows that unless a mask defect falls in a small susceptible area (low probability), the defect is not critical. For instance, a defect in the third mask utilized in the process would have to fall in a channel region of an enhancement mode device to be critical; a defect in any other area will have no effect. Since the ratio of an enhancement mode channel region area to the total area is small, the probability of a defect falling in the channel region is also small. As a result, yield increases. Other mask levels utilized in the process also have low probability of critical mask defects.

Figs. 1, 2, and 3 show the present process after steps 9, 14, and 16, respectively. The first 10 steps of the process given hereinbelow are similar to processes which are known previously for the present application. The use of double-masking features for the contact holes, combined with the masking for the ion implantation, constitutes the improved feature. Also, the total mask requirement of 5 is the same as for other depletion mode processes, but additional protection against defects has been gained. 1) Thermally grow a thin oxide layer on the surface of a silicon substrate. 2) Deposit a thin silicon nitride layer using well-known techniques. 3) Deposit a thick layer of silicon dioxide by chemical vapor deposition. (CVD oxide) 4) Delineate source and drain regions, (diffusion regions) (mask #1) 5) Etch thick CVD oxide, using well-known...