Browse Prior Art Database

Alternate Path Control Systems

IP.com Disclosure Number: IPCOM000080053D
Original Publication Date: 1973-Oct-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 3 page(s) / 72K

Publishing Venue

IBM

Related People

Swenson, WG: AUTHOR

Abstract

For a high degree of reliability, alternate pathing for status reporting and supplying control signals is highly desirable. Such alternate path switching should be effective, even though there is a catastrophic power failure in one or more portions of apparatus being controlled. Hierarchical status signal buffering increases the probability of successfully recovering status when certain portions of a multiunit system being controlled have catastrophic failures, not caused by an overall power failure.

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Alternate Path Control Systems

For a high degree of reliability, alternate pathing for status reporting and supplying control signals is highly desirable. Such alternate path switching should be effective, even though there is a catastrophic power failure in one or more portions of apparatus being controlled. Hierarchical status signal buffering increases the probability of successfully recovering status when certain portions of a multiunit system being controlled have catastrophic failures, not caused by an overall power failure.

An intermediate control of the controlled system is divided into two parts, which are independently powered by power supplies #1 and #2 and as indicated in the two dashed-line boxes. The devices being controlled by controller #1 and controller #2 additionally may have independent power supplies or may be, respectively, powered by power supplies #1 and #2. The controlling system may have one or more cable connections to interface circuits #1 and #2, each of which include buffer circuits for storing status information concerning the respective control processors, gating circuits, connection circuits, power supplies, controllers, and devices. Hence, if an element in the controlled system fails with the power supply still powering the interface circuits, the controlling system can retrieve the status just prior to the failure from the interface buffers.

The transfer of control signals from controlling system to the devices follows either one of the two routes. If interface circuit #1 is active, then interface circuit #2 and its associated control elements are inactive. The controlled signals are supplied through interface circuit #1 and its buffer to control processor #1 via intermediate bus IB1. Processor #1 interprets the control signals from the controlling system and, in turn, issues control command signals through gating circuits #1 to coupling bus CB1, which is electrically connected to coupling bus CB2. From CB1, the control command signals pass through connection circuits #l or connection circuits #2 to the respective controllers #1 or #2.

Control processor #1 actuates both controllers #1 and #2, since control processor #2 and intermediate bus IB2 has been deactivated pursuant to deactivation of interface circuits #2. From the respective controllers #1 or #2, the illustrated devices are controlled either individually by the controllers or via a multiplexing unit MPX, wherein either controller can control any of the devices in a controlled system. It is preferred that the connection circuits, controllers, and devices be independently powered from the intervening controlling systems illustrated in the dashed-line boxes. Examples of devices are computers, positioning mechanisms, tape drives, disk files, high-speed printers, electric typewriters, terminals of all types, and the like.

"Isolator and coupler" connecting CB1 and CB2 can take several forms...