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Rectifier Reverse Recovery Go/No Go Test Circuit

IP.com Disclosure Number: IPCOM000080076D
Original Publication Date: 1973-Oct-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Radcliff, WE: AUTHOR

Abstract

The Device Under Test (DUT) 5 is connected to a voltage and current generating circuit 6 and the resulting current thru the DUT is shown at waveform 1. The specification for the DUT requires that the slope from -1.0 ampere to -0.5 ampere not exceed 1.1 amperes per usec or in the alternative that the time between the -1.0 ampere and the -0.5 ampere points A-B be greater than 454 nsec. The circuit operates as follows:

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Rectifier Reverse Recovery Go/No Go Test Circuit

The Device Under Test (DUT) 5 is connected to a voltage and current generating circuit 6 and the resulting current thru the DUT is shown at waveform
1. The specification for the DUT requires that the slope from -1.0 ampere to -0.5 ampere not exceed 1.1 amperes per usec or in the alternative that the time between the -1.0 ampere and the -0.5 ampere points A-B be greater than 454 nsec. The circuit operates as follows:

When the current, flowing thru the DUT, reaches -1.0 ampere (t1) the comparator's 7 output switches; this transition does not cause the single-shot 8 to time out. The next time (t2) where the DUT current crosses the -1.0 ampere point, the comparator's output switches again causing the 380 nsec single-shot 9. The output of 9 is applied to the latch enable of comparator 10 which allows the output of 10 to follow its inputs, until the enable pulse is removed (t4).

When the enable pulse is removed, the comparator's output 4 is latched at a high state if the DUT is a ``FAIL'' and the output is latched low if the DUT is a ``PASS''. The output of 10 is fed to a driver circuit which lights the fail indicator. The two single-shots are adjusted so, that the total delay including the comparators is 454 nsec (1.1 ampere/usec) for a 0.5 ampere change, in order to conform to the particular desired test specification.

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