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Zero Skew Clock Distribution System

IP.com Disclosure Number: IPCOM000080125D
Original Publication Date: 1973-Jan-01
Included in the Prior Art Database: 2005-Feb-26
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Radcliffe, JK: AUTHOR [+2]

Abstract

In data-processing systems clock pulses are required at many spaced apart circuits with a small line skew. In this system, a clock pulse driver is impedance matched to the transmission line it drives. The rise and fall times of the driver are slow relative to the line delay. The line system is arranged so that the reflections within the system, cause all points in the system to reach a threshold voltage at the same time.

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Zero Skew Clock Distribution System

In data-processing systems clock pulses are required at many spaced apart circuits with a small line skew. In this system, a clock pulse driver is impedance matched to the transmission line it drives. The rise and fall times of the driver are slow relative to the line delay. The line system is arranged so that the reflections within the system, cause all points in the system to reach a threshold voltage at the same time.

In the figure, an open ended transmission line is impedance matched to a driver with voltage swing Vg and rise time Tr. Threshold circuits with a threshold voltage Vt are spaced apart along the line. After a time interval 2T, all points on the line are at the same voltage Vg(T/Tr). The rise time Tr must be at least T(Vg/Vt) for proper operation.

An alternative system has threshold circuits spaced around a closed-loop transmission line of impedance Zo. This loop is fed by a line of impedance Zo/2 to which the driver is impedance matched. Operation is similar to the above system with 2T equal to the loop time delay.

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