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Complementary Bipolar FET Structure

IP.com Disclosure Number: IPCOM000080149D
Original Publication Date: 1973-Nov-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Ghafghaichi, M: AUTHOR [+3]

Abstract

The present complementary bipolar field-effect transistor (FET) structure proposes to eliminate the dependency of standard FET's on gate oxide thickness.

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Complementary Bipolar FET Structure

The present complementary bipolar field-effect transistor (FET) structure proposes to eliminate the dependency of standard FET's on gate oxide thickness.

The bipolar FET's shown in the figure are produced by the following steps. P- substrate 10 and epitaxial layer 11, preferably N- in characteristic, are deposited to form interface 12. Two pockets 13 and 14 in the structure are provided through the formation of recessed silicon dioxide region 15, which extends beyond interface 12. This recessed silicon dioxide region may be formed by first etching about one-half the proposed recessed oxide depth into the epitaxial layer and then, by a masked thermal oxidation of the silicon epitaxial layer and substrate, completing the formation of recessed oxide region 15.

P+ region 16 in pocket 13 and N+ region 17 in pocket 14 may be conveniently formed, by initial P+ and N+ diffusions into substrate 10 prior to the deposition of epitaxial layer 11. Then, during epitaxial deposition, P+ region 16 and N+ region 17 will out-diffuse towards surface 18 and continue to out-diffuse during subsequent high-heat processing steps.

In such a structure, the lowest majority carrier concentrations in regions 16 and 17 will be at surface 18. Then, source and drain regions 24 and 19, as well as source and drain regions 20 and 21, are formed at surface 18 by suitable means such as diffusion or ion implantation.

Because of the low majority carrier concentratio...