Browse Prior Art Database

Bit/Sense Scheme

IP.com Disclosure Number: IPCOM000080261D
Original Publication Date: 1973-Nov-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Gersbach, J: AUTHOR [+4]

Abstract

A dense memory cell functional over a wide temperature range and with a broad voltage tolerance which gives fast read and write times, and which uses bit line sensing pinch resistors and Schottky diode clamping is described.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 57% of the total text.

Page 1 of 2

Bit/Sense Scheme

A dense memory cell functional over a wide temperature range and with a broad voltage tolerance which gives fast read and write times, and which uses bit line sensing pinch resistors and Schottky diode clamping is described.

A transistor T1 is created in an isolation pocket and is cross-coupled to a second transistor T2 created in a second isolation pocket, thereby forming when coupled together, a bistable circuit. Load resistors R1 and R2 are connected between the collector of each transistor and a reference word top held at a reference voltage through a fixed current limiting resistor R3. Resistors R1 and R2 are conventionally formed as pinch resistors in the base diffusion area of each of the transistors T1 and T2. Diodes D1 and D2 are shown in parallel with the respective resistors Rl and R2, and are parasitic to the layout to the transistors T1 and T2.

A first bit line B1 is connected through a Schottky barrier diode D3 into the collector of the first transistor T1 and the base of a second transistor T2. A second bit line B2 is similarly connected through a different Schottky barrier diode D4 to the collector of the second transistor T2 and the base of the first transistor T1. These diodes help make the cell relatively insensitive to full and half-select disturbed conditions. Diodes D5 and D6, respectively coupled between the base and the collector of each of the two transistors, are also Schottky barrier diodes and are used to clamp their r...