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Dynamic Instruction Set Definition

IP.com Disclosure Number: IPCOM000080266D
Original Publication Date: 1973-Nov-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Edel, TR: AUTHOR [+2]

Abstract

Current Mainline Systems differentiate between CPU instructions as either Problem or Supervisor State. The state is described by a binary status indicator associated with a given code string. Thus, many code strings existing in the system concurrently can be separately defined as either: - Problem Program State - Supervisor State.

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Dynamic Instruction Set Definition

Current Mainline Systems differentiate between CPU instructions as either Problem or Supervisor State. The state is described by a binary status indicator associated with a given code string. Thus, many code strings existing in the system concurrently can be separately defined as either: - Problem Program State

- Supervisor State.

This architecture in effect gives "all or nothing" capability to todays system users even though what is generally desired by making a given code string privileged, is the ability to use only one or two instructions which are part of the privileged set. Described is a means to uniquely define an instruction set on a per user basis. Thus, there is no concept of privileged/nonprivileged.

A hardware control register which contains a binary indicator for each instruction, or class of instructions, in the system, which is capable of being saved and restored, is all that is needed to define an instruction set per user. The "saved" control register value is Hardware Status associated with a given code string that is later "restored", whenever that code string again becomes eligible for CPU execution. Thus, similar to a 360's PSW (Program Status Word), General/Floating Point Register, the Instruction Set Control Register becomes additional status associated with a given code string. Whenever the unauthorized use of an instruction is attempted, an Exception Condition is raised by the Hardware.

The following exa...