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Browse Prior Art Database

Device Interconnection Package

IP.com Disclosure Number: IPCOM000080302D
Original Publication Date: 1973-Nov-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Goldmann, LS: AUTHOR

Abstract

A substrate of three electrically and thermally conductive elements 11 separated by dielectric spacers 12, is used as an electrical connection and heat sink to a silicon power transistor device 15. The device 15 is soldered to wettable areas 16. Solder 17 is deposited on the wettable chip pad areas 18 for bonding the device 15.

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Device Interconnection Package

A substrate of three electrically and thermally conductive elements 11 separated by dielectric spacers 12, is used as an electrical connection and heat sink to a silicon power transistor device 15. The device 15 is soldered to wettable areas 16. Solder 17 is deposited on the wettable chip pad areas 18 for bonding the device 15.

The conductive elements 11 may be different materials, but preferably molybdenum or a low-expansion nickel alloy for reducing thermal mismatch with its associated silicon chip on one side and with an alumina module on the other. The dielectric may also be of many materials, preferably alumina. The structure can be held together with adhesive layers or by dielectric pins 20. Interconnection to the next level of packaging, depicted at 22, can be affected by pins 24 brazed to the bottom of the substrate. Solder joints may be alternatively used. The package provide efficient heat transfer to a gaseous or liquid cooling medium.

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