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Oscillator

IP.com Disclosure Number: IPCOM000080325D
Original Publication Date: 1973-Dec-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 3 page(s) / 55K

Publishing Venue

IBM

Related People

Testani, AJ: AUTHOR

Abstract

The integrator operational amplifiers U2, U3 of a known quadrature oscillator circuit are provided with a limiting function, by regulating the bias supply to the amplifiers.

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Oscillator

The integrator operational amplifiers U2, U3 of a known quadrature oscillator circuit are provided with a limiting function, by regulating the bias supply to the amplifiers.

Stage 1 is a modified basic oscillator circuit, cf. "Operational Amplifiers Design and Applications", J. G. Graeme et al, McGraw Hill, 1971, pp.388-390. Stage 2 regulates the positive bias supply applied across positive terminals 1a and 1b. The oscillator is capable of providing sine and cosine output signals at output terminals A and B, respectively. Stage 3 is a crossover detector stage which provides a square-wave output at terminal C.

The frequency of sinusoidal oscillator stage 1 is determined by the condition that the loop-phase shift is zero. Oscillations are not sustained if, at the oscillator frequency, the magnitude of the loop gain is less than unity. It is impossible to obtain a loop gain precisely equal to unity over wide temperature variations, while maintaining relative frequency stability. A small amount of positive feedback is introduced to sustain the oscillations. This positive feedback, however, causes a slight increase in amplitude of the signal as it travels around the loop. The signal amplitude continues to increase, until it operates in the nonlinear portion of the transfer characteristic of one of the circuit elements.

Thus, in practice, the loop gain is slightly larger than unity, and the amplitude of the oscillations is limited by the onset of nonlinearity.

Thus, in practice, the loop gain is slightly larger than unity, and the amplitude of the oscillations is limited by the onset of nonlinearity.

Stage 2 provides a "controlled nonlinearity" by adjusting the positive bias supply on the integrating amplifiers U2, U3. Since a nonlinearity exists in every circuit as the operating values approach the bias supplies, slight controlled variations in supply voltage are used to regulate the amplitude of oscillations.

In operation, amplifier U4 acts as a buffer amplifier. Its input is the sinusoid whose amplitude is to be controlled. This sinusoid is peak detected by diode CR1 and capacitor C9. The peak detector output is buffered by amplifier U5 and compared in amplifier U6 with a precision reference voltage at 2a. The...