Browse Prior Art Database

Low Level Differential Sense Amplifier

IP.com Disclosure Number: IPCOM000080371D
Original Publication Date: 1973-Dec-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 3 page(s) / 63K

Publishing Venue

IBM

Related People

Repchick, DP: AUTHOR [+2]

Abstract

This sense amplifier is capable of detecting small voltage variations (0.1-1 mv) and amplifies the signals to logic levels of +0.5 V and -0.5 V. The sense amplifier is utilized to sense the change in voltage across a magnetoresistive element. In order to provide common-mode noise rejection, the magnetoresistive elements are used in pairs, and the voltage across them is sensed differentially. The mismatch in the magnetoresistive sense elements themselves can provide a differential voltage offset. The amplifier provides a solution to the offset problem at low cost.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Low Level Differential Sense Amplifier

This sense amplifier is capable of detecting small voltage variations (0.1-1 mv) and amplifies the signals to logic levels of +0.5 V and -0.5 V. The sense amplifier is utilized to sense the change in voltage across a magnetoresistive element. In order to provide common-mode noise rejection, the magnetoresistive elements are used in pairs, and the voltage across them is sensed differentially. The mismatch in the magnetoresistive sense elements themselves can provide a differential voltage offset. The amplifier provides a solution to the offset problem at low cost.

The differential amplifier is basically divided into two sections, the first section is a cascode configuration while the second stage output is fed back through a current source which nulls the input offset voltage. In order to minimize the amplifier noise, four NPN devices are placed in parallel at each of the inputs to minimize the voltage noise source. This dictates a cascode configuration to minimize Miller capacitance. Current sources are utilized to obtain the greatest common-mode rejection (common-mode feedback). The differential voltage gain of the first stage is approximately 100.

The differential voltage input V(in1) and V(in2) are connected to the bases of parallel transistors T1 and T2, respectively. The emitters of these input transistors T1, T2 are connected to the collector of transistor T3. The emitter of transistor T3 is connected to a -3.0 V source. Transistors T3 and T4 form a current source for the differential amplifier 12. The inputs to the differential amplifier 12 are obtained from the input transistors T1,T2. The transistors T5 and T6 are connected in cascode between inputs transistors T1,T2 and differential amplifier 12. The differential amplifier is a well-known differential type amplifier. The outputs are obtained from emitter-follower outputs of the differential amplifier and are connected to the bases of transistors T7 and T8, respectively, in the second stage of the differential sense amplifier.

The most significant attribute of the second stage is that it exhibits a 10:1 gain feature. The adjustment can be made by placi...