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Nonlinear Timer

IP.com Disclosure Number: IPCOM000080385D
Original Publication Date: 1973-Dec-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Ouchi, NK: AUTHOR

Abstract

Fig. 1 shows a nonlinear timer which provides flexibility in determining the time intervals between sequential events associated with a given command.

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Nonlinear Timer

Fig. 1 shows a nonlinear timer which provides flexibility in determining the time intervals between sequential events associated with a given command.

Shift register 8 has one stage for each event. A given command set would, therefore, require the shift register to have as many stages as the maximum number of events associated with the longest command. The matrix of AND circuits 1-6 decode the event and the command to provide the timing associated with each command.

Counter 7 is stepped by the clock oscillator, at a unit time rate greater than any time interval between any two adjacent events within carry of the counter acts as a shifting pulse for shift register 8, thereby causing the next stage of the shift register to become activated. As each event associated with a command is activated, it will cause a count to be preset into the counter such that the carry will occur at a predetermined time, thereby determining the time between the event that has just started and the start of the next event.

By way of example, command 1 and command 2 are both shown to have three events. It should be noted that the same number of events need not be associated with all commands, and further that event 1 for command 1 need not cause the same response as event 1 for command 2. Before a command is activated, the shift register 8 is reset such that the event 1 stage of the shift register 8 is activated. When a command line is activated, for example command 1, AND...