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Preventing Single Bit Errors from Becoming Double Bit Errors

IP.com Disclosure Number: IPCOM000080574D
Original Publication Date: 1974-Jan-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Toepfer, JL: AUTHOR

Abstract

This scheme prevents a correctable single-bit error from becoming incorrectable double-bit error, during the transfer of lines of data from one level to another in a hierarchical memory system.

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Preventing Single Bit Errors from Becoming Double Bit Errors

This scheme prevents a correctable single-bit error from becoming incorrectable double-bit error, during the transfer of lines of data from one level to another in a hierarchical memory system.

In a hierarchical memory system with multiple storage levels, it is possible that correctable errors can be mapped into incorrectable errors by the transfer of data from one level to another. For instance, assuming a transfer from the line A3 of the L3 array 10 to line Alpha 1 of the L2 array 12, a single bad bit in data segment 14 may become a multiple error in segment 16 in the line Alpha 1 of array 12, if there is a stuck bit in each of the segments 14 and 16.

To overcome this the use of directories 18 and 20 are proposed, in which each data segment on each line is represented by a binary digit. If a segment binary digit is "0" there are no bad bits in the particular segment, and if the binary digit is "1" there is one or more bad bits in the data segment. Thus, before making a transfer a comparison of the contents of the directories 18 and 20 will tell whether errors will be compounded. When the segment binary digit is 1 for both the segment 14 from which data is being transferred and the segment 16 into which data is being transferred, a different data line will be used to store the data in the L2 array 12 to prevent the incorrectable error from occurring.

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