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Resistance Capacitance Methods for Determining Oxide Etch End Point

IP.com Disclosure Number: IPCOM000080667D
Original Publication Date: 1974-Jan-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Liu, CJ: AUTHOR [+2]

Abstract

As part of the semiconductor manufacturing process, it is necessary to determine the end point of the oxide etching, i.e., the moment when a layer of silicon dioxide has been completely etched away from an under-lying silicon substrate. The etch end point is detected by applying a potential across the oxide-covered silicon substrate while the oxide is being etched away, and monitoring the change in resistance or the change in capacitance that occurs when the etch end point is reached. The potential is applied with the aid of a contact on the backside of the silicon wafer and an electrode immersed in the conductive etchant solution.

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Resistance Capacitance Methods for Determining Oxide Etch End Point

As part of the semiconductor manufacturing process, it is necessary to determine the end point of the oxide etching, i.e., the moment when a layer of silicon dioxide has been completely etched away from an under-lying silicon substrate. The etch end point is detected by applying a potential across the oxide-covered silicon substrate while the oxide is being etched away, and monitoring the change in resistance or the change in capacitance that occurs when the etch end point is reached. The potential is applied with the aid of a contact on the backside of the silicon wafer and an electrode immersed in the conductive etchant solution.

The resistance method of Fig. 1 utilizes the facts that silicon wafer 1 is a relatively good conductor, while the oxide layer on upper surface 2 of wafer 1 is a good insulator. Conductive oxide etchant 5 covers the upper surface of wafer 1. A source of voltage 3 is impressed across the oxide covered wafer 1, by electrode 4 immersed in conductive oxide etchant 5 and spring contact 6 on the lower surface of wafer 1. Contact 6 is connected to source 3 through resistor 7. Wafer 1 is held between the upper and lower portions of TEFLON* fixture 8, which is sealed against leakage of etchant 5 by O-ring 9. A small leakage current flows through resistor 7 during the time that the oxide layer is being etched away. When the etch end point is reached, the current through resistor...