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Matrix Oriented Testing of Analog Circuits

IP.com Disclosure Number: IPCOM000080693D
Original Publication Date: 1974-Jan-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 4 page(s) / 75K

Publishing Venue

IBM

Related People

Kassis, WA: AUTHOR

Abstract

The concept described is for the verification and testing of analog functions and circuitry. The concept utilizes a combination of systems mathematics and hardware. The testing is based upon information about the complex circuit obtained from the designer or from simulation programs employed to design the circuit. In this system, the device under test is considered a part of the system and thus imbedded in a digital environment rather than an isolated test environment. The System output is confined to discrete values of "1's" for good test and "0's" for bad test to provide a concise test result, and for the control of other semiautomatic analog circuits testers.

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Matrix Oriented Testing of Analog Circuits

The concept described is for the verification and testing of analog functions and circuitry. The concept utilizes a combination of systems mathematics and hardware. The testing is based upon information about the complex circuit obtained from the designer or from simulation programs employed to design the circuit. In this system, the device under test is considered a part of the system and thus imbedded in a digital environment rather than an isolated test environment. The System output is confined to discrete values of "1's" for good test and "0's" for bad test to provide a concise test result, and for the control of other semiautomatic analog circuits testers.

As a standalone system, the implementation includes a subsystem for test of analog circuits simulated in the frequency domain, a subsystem for test of analog circuits simulated in the time domain, and a resultant matrix for test, verification and diagnostics of circuits under test.

Given certain information about the analog circuit to be tested, then it is possible to test, verify and diagnose the circuit functionally through usage of the system. Necessary information for the system is the following.
1) Independent but relates input/output pairs for

the circuit or device under test;
2) Simulations of the circuit to be tested such as

frequency domain plots, time domain plots, or any

plot or listing describing the circuit variable(s)

as a function of the independent variable (s).

(Simulation outputs describing the circuits

characteristics in the form of differential

equations, difference equations, poles and zeros

transfer functions. The A B C D matrices are

excellent choices for verification, test and

diagnoses employed by this system.);
3) Performance profile identifying and defining

critical areas, characteristics or parameters of

of the circuit; and
4) Other pertinent information about the circuit under

test such as timing, frequency band, linearity and

nonlinearity, types of inputs and corresponding

outputs etc.

In the case of the frequency domain part of the system, a program design simulation of a circuit is obtained "given" in terms of amplitude versus frequency and the corresponding phase vs. frequency characteristics. Samples of the amplitude and phase vs. frequency are obtained for critical or important areas. The samples are coded in digital format and stored. Certain processing takes place to obtain and store the inverted magnitudes and negative values for phase, for each corresponding sample. The inverted amplitudes and negative phases are stored in a fashion to be clocked out in parallel and in synchronization with a bank of computer controlled oscillators, whose frequencies are those of the

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sampled frequencies. The parallel bank of signals is merged into a summing device whose output is the input to the device under test.

Mathematically, the test signals look like x(i) (omega tau), where

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